Custom/Analog Layout

This role is for one of Weekday’s clients
Salary range: Rs 1200000 - Rs 1800000 (ie INR 12 - 18 LPA)

Min Experience: 4+ years
Location: Hyderabad
JobType: full-time

We are looking for an experienced and detail-orientedCustom/Analog Layout Engineerwith 4–11 years of hands-on experience in semiconductor physical design. The ideal candidate will have strong expertise inAnalog LayoutandCustom Layout, with a solid understanding of analog and mixed-signal circuit requirements, layout methodologies, and advanced semiconductor process technologies.

In this role, you will be responsible for translating circuit schematics into high-quality physical layouts while ensuring performance, reliability, area efficiency, and manufacturability. You will work closely with circuit designers, physical design engineers, and technology teams to develop layouts for complex analog and custom blocks.

Requirements

Key Responsibilities

• Design and developcustom and analog layoutsfor semiconductor devices and integrated circuits based on schematics and design specifications.
• Perform completeAnalog Layoutimplementation for blocks such as amplifiers, ADCs/DACs, PLLs, bandgaps, references, regulators, oscillators, and other analog/mixed-signal circuits.
• Develop high-qualityCustom Layoutusing appropriate layout techniques and process-specific design rules.
• Apply advanced layout techniques includingcommon-centroid, interdigitation, symmetry, matching, shielding, guard rings, dummy devices, and differential routing.
• Analyze circuit requirements and translate electrical constraints into optimized physical layouts.
• PerformDesign Rule Check (DRC), Layout Versus Schematic (LVS), and parasitic extractionand resolve related issues.
• Work with circuit designers to identify and address layout-dependent effects, parasitics, matching issues, and performance degradation.
• Optimize layouts forarea, power, signal integrity, noise, matching, and overall circuit performance.
• Participate in post-layout simulations and troubleshoot issues related to parasitic resistance and capacitance.
• Ensure layouts comply with foundry-specific process design kits (PDKs), technology files, and design methodologies.
• Collaborate with cross-functional teams throughout the design, verification, and tape-out process.
• Maintain accurate documentation and follow established layout quality and verification standards.

Must-Have Skills

• Strong hands-on experience in Analog Layout.
• Strong expertise in Custom Layout.
• 4–11 years of relevant experience in semiconductor/VLSI layout design.
• Good understanding of analog and mixed-signal circuit concepts.
• Strong knowledge of layout-dependent effects, device matching, parasitics, and physical design considerations.
• Hands-on experience withDRC, LVS, and parasitic extraction.
• Experience working with industry-standard custom layout and verification tools.
• Ability to interpret schematics and understand circuit-level design requirements.
• Strong understanding of CMOS technologies and semiconductor fabrication concepts.
• Experience working with foundry PDKs and technology-specific design rules.
• Strong debugging and problem-solving skills with attention to layout quality and detail.

Good-to-Have Skills

• Experience with advanced-node technologies and complex analog/mixed-signal designs.
• Exposure to high-speed, RF, memory, or power-management layouts.
• Knowledge of post-layout simulation and parasitic-aware circuit optimization.
• Experience supporting full-chip integration and tape-out activities.
• Familiarity with automation or scripting for layout-related tasks.

Education

Bachelor’s or Master’s degree inElectronics Engineering, Electrical Engineering, VLSI Design, Microelectronics, or a related discipline.